MATLAB SIMULINK HDL CODER 1 Manuale Utente Pagina 8

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9/21/2011
8
Where do you spend most of your time?
Simulating designs?
Creating designs and test
benches?
Algorithm Design
System Test Bench
System Designer
Analyzing and combining results
from multiple tools?
Exploring implementation ideas
and architectures?
Floating point to fixed-point?
Writing HW specifications?
Algorithm
Design
Fixed-Point
Timing / Control Logic
Architecture Exploration
Algorithms / IP
System
Test
Bench
Environment Models
Algorithms / IP
Analog Models
Digital Models
FPGA Requirements
18
Iterating over designs with the
FPGA designer?
Blaming the FPGA designer?
Hardware Specification
Test Stimulus
FPGA Designer
Where do you spend most of your time?
Simulating designs and validating
against HW specs?
Creating designs and writing test
RTL Design
Verification
benches?
Hardware architecture design?
Writing interfaces to existing IP?
Synthesis, Map, PAR cycles?
Iterating over designs with the
system designer?
RTL
Design
IP Interfaces
Hardware Architecture
Verification
Functional Simulation
Static Timing Analysis
Timing Simulation
Behavioral Simulation
Back Annotation
Implement Design
M
ap
Synthesis
19
system
designer?
Blaming the system designer?
ap
Place & Route
FPGA Hardware
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