MATLAB SIMULINK HDL CODER 1 Manuale Utente Scaricare il pdf (Pagina 44)

9/21/2011

 Use Model-Based Design to provide

an integrated workflow

Things to remember ….

DESIGN

 Speed up algorithm development

with a unified design environment

 Automate manual steps in

FPGA implementation to enable

shorter iteration c

cles

Algorithm

Development

MATLAB

Simulink

Stateflow

 Integrate FPGA development tools to

reduce verification time

 Shorter implementation time by 48% (total project 33%)

 Reduced FPGA prototype development schedule by 47%

ROI: Customer Adoption Of Model-Based Design

Time spent on FPGA/ASIC implementation

 Shorter design iteration cycle by 80%

FPGA Prototype 2

FPGA Prototype

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MATLAB SIMULINK HDL CODER 1 Manuale Utente Pagina 44