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System
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DSP
Getting Started Guide
UG639 (v 12.2) July 23, 2010
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Sommario

Pagina 1 - Generator for

System Generator for DSPGetting Started GuideUG639 (v 12.2) July 23, 2010

Pagina 2

10 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Preface: About This Guide

Pagina 3 - Table of Contents

System Generator for DSP Getting Started Guide www.xilinx.com 11UG639 (v 12.2) July 23, 2010Chapter 1IntroductionSystem Generator is a DSP design tool

Pagina 4 - Chapter 4: Getting Started

12 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 1: IntroductionThe Xilinx DSP Block SetOver 90 DSP

Pagina 5

System Generator for DSP Getting Started Guide www.xilinx.com 13UG639 (v 12.2) July 23, 2010FIR Filter GenerationFIR Filter GenerationSystem Generator

Pagina 6

14 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 1: IntroductionSupport for MATLABIncluded in Syste

Pagina 7 - About This Guide

System Generator for DSP Getting Started Guide www.xilinx.com 15UG639 (v 12.2) July 23, 2010System Resource EstimationSystem Resource EstimationSystem

Pagina 8 - Conventions

16 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 1: IntroductionHardware Co-SimulationSystem Genera

Pagina 9 - Online Document

System Generator for DSP Getting Started Guide www.xilinx.com 17UG639 (v 12.2) July 23, 2010System Integration PlatformSystem Integration PlatformSyst

Pagina 10 - Preface: About This Guide

18 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 1: Introduction

Pagina 11 - Introduction

System Generator for DSP Getting Started Guide www.xilinx.com 19UG639 (v 12.2) July 23, 2010Chapter 2InstallationDownloadingSystem Generator is part o

Pagina 12 - The Xilinx DSP Block Set

System Generator for DSP Getting Started Guide www.xilinx.com UG639 (v 12.2) July 23, 2010Xilinx is disclosing this user guide, manual, release note,

Pagina 13 - FIR Filter Generation

20 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 2: InstallationOperating System and Software Requi

Pagina 14 - Support for MATLAB

System Generator for DSP Getting Started Guide www.xilinx.com 21UG639 (v 12.2) July 23, 2010System Requirements and RecommendationsUNC Paths Not Suppo

Pagina 15 - System Resource Estimation

22 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 2: InstallationUsing the ISE Design Suite Installe

Pagina 16 - Hardware Co-Simulation

System Generator for DSP Getting Started Guide www.xilinx.com 23UG639 (v 12.2) July 23, 2010Post Installation TasksIf the XML file is unreadable, the

Pagina 17 - System Integration Platform

24 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 2: InstallationNote: If installation instructions

Pagina 18 - Chapter 1: Introduction

System Generator for DSP Getting Started Guide www.xilinx.com 25UG639 (v 12.2) July 23, 2010Post Installation TasksConfiguring the System Generator Ca

Pagina 19 - Installation

26 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 2: Installation

Pagina 20 - Table 2-4:

System Generator for DSP Getting Started Guide www.xilinx.com 27UG639 (v 12.2) July 23, 2010Chapter 3Release InformationRelease Notes 12.2System Gener

Pagina 21 - Software Prerequisites

28 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 3: Release InformationReed Solomon Encoder 7.1• Re

Pagina 22 - Post Installation Tasks

System Generator for DSP Getting Started Guide www.xilinx.com 29UG639 (v 12.2) July 23, 2010Release Notes 12.2Known IssuesKnown issues with System Gen

Pagina 23 - UG639 (v 12.2) July 23, 2010

System Generator for DSP Getting Started Guide www.xilinx.com 3UG639 (v 12.2) July 23, 2010Preface: About This GuideGuide Contents . . . . . . . . .

Pagina 24 - ModelSim SE

30 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 3: Release InformationRelease Notes 12.1System Gen

Pagina 25 - Setting the Number of Entries

System Generator for DSP Getting Started Guide www.xilinx.com 31UG639 (v 12.2) July 23, 2010Release Notes 12.1System Generator & Software Developm

Pagina 26

32 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 3: Release InformationConvert• An enable port has

Pagina 27 - Release Information

System Generator for DSP Getting Started Guide www.xilinx.com 33UG639 (v 12.2) July 23, 2010Release Notes 12.1Automatic NormalizationThe input and out

Pagina 28 - Hardware Recommendations

34 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 3: Release InformationKnown IssuesKnown issues wit

Pagina 29 - Known Issues

System Generator for DSP Getting Started Guide www.xilinx.com 35UG639 (v 12.2) July 23, 2010Release Notes 11.4Release Notes 11.4System Generator Enhan

Pagina 30 - Release Notes 12.1

36 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 3: Release Information• Support has been added for

Pagina 31 - Xilinx Blockset Enhancements

System Generator for DSP Getting Started Guide www.xilinx.com 37UG639 (v 12.2) July 23, 2010Release Notes 11.4Operating System and Software Requiremen

Pagina 32

38 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 3: Release InformationMathWorks MATLAB® Version 20

Pagina 33

System Generator for DSP Getting Started Guide www.xilinx.com 39UG639 (v 12.2) July 23, 2010Release Notes 11.3Release Notes 11.3System Generator Enhan

Pagina 34

4 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Xilinx Blockset Enhancements . . . . . . . . . . . . . . .

Pagina 35 - Release Notes 11.4

40 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 3: Release Information• Option to configure DDS us

Pagina 36

System Generator for DSP Getting Started Guide www.xilinx.com 41UG639 (v 12.2) July 23, 2010Release Notes 11.3Operating System and Software Requiremen

Pagina 37 - Table 3-6:

42 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 3: Release Information

Pagina 38

System Generator for DSP Getting Started Guide www.xilinx.com 43UG639 (v 12.2) July 23, 2010Chapter 4Getting StartedIntroductionThis Getting Started t

Pagina 39 - Release Notes 11.3

44 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedLesson 1 - Design Creation Basic

Pagina 40 - Existing Block Updates

System Generator for DSP Getting Started Guide www.xilinx.com 45UG639 (v 12.2) July 23, 2010Lesson 1 - Design Creation BasicsThe Xilinx DSP BlocksetTh

Pagina 41 - Table 3-8:

46 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedDefining the FPGA BoundarySystem

Pagina 42

System Generator for DSP Getting Started Guide www.xilinx.com 47UG639 (v 12.2) July 23, 2010Lesson 1 - Design Creation BasicsAdding the System Generat

Pagina 43 - Getting Started

48 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedCreating the DSP DesignOnce the

Pagina 44 - ® Simulator

System Generator for DSP Getting Started Guide www.xilinx.com 49UG639 (v 12.2) July 23, 2010Lesson 1 - Design Creation BasicsGenerating the HDL CodeOn

Pagina 45 - The Xilinx DSP Blockset

System Generator for DSP Getting Started Guide www.xilinx.com 5UG639 (v 12.2) July 23, 2010Up and Down Sampling Blocks . . . . . . . . . . . . . . . .

Pagina 46 - Defining the FPGA Boundary

50 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedModel-Based Design using System

Pagina 47

System Generator for DSP Getting Started Guide www.xilinx.com 51UG639 (v 12.2) July 23, 2010Lesson 1 - Design Creation BasicsCreating Input Vectors us

Pagina 48 - Creating the DSP Design

52 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedLesson 1 Summary• You partition

Pagina 49 - Generating the HDL Code

System Generator for DSP Getting Started Guide www.xilinx.com 53UG639 (v 12.2) July 23, 2010Lesson 2 - Fixed Point and Bit OperationsLesson 2 - Fixed

Pagina 50 - DSP blockset

54 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedSystem Generator Fixed-Point Qua

Pagina 51

System Generator for DSP Getting Started Guide www.xilinx.com 55UG639 (v 12.2) July 23, 2010Lesson 2 - Fixed Point and Bit OperationsOverflow and Roun

Pagina 52 - Lab Exercise: Using Simulink

56 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedBit-Level OperationsIn a real DS

Pagina 53 - Fixed-Point Numeric Precision

System Generator for DSP Getting Started Guide www.xilinx.com 57UG639 (v 12.2) July 23, 2010Lesson 2 - Fixed Point and Bit OperationsThe Reinterpret B

Pagina 54

58 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedThe Convert BlockThe Convert blo

Pagina 55 - Overflow and Round Modes

System Generator for DSP Getting Started Guide www.xilinx.com 59UG639 (v 12.2) July 23, 2010Lesson 2 - Fixed Point and Bit OperationsThe Concat BlockT

Pagina 56 - Bit-Level Operations

6 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010

Pagina 57 - The Reinterpret Block

60 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedSlice BlockThe Slice block is us

Pagina 58 - The Convert Block

System Generator for DSP Getting Started Guide www.xilinx.com 61UG639 (v 12.2) July 23, 2010Lesson 2 - Fixed Point and Bit OperationsThe BitBasher Blo

Pagina 59 - The Concat Block

62 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedLesson 2 Summary• Quantization a

Pagina 60 - Slice Block

System Generator for DSP Getting Started Guide www.xilinx.com 63UG639 (v 12.2) July 23, 2010Lesson 3 - System ControlLesson 3 - System ControlControll

Pagina 61 - The BitBasher Block

64 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedThe MCode BlockThe MCode block s

Pagina 62 - Lab Exercise: Signal Routing

System Generator for DSP Getting Started Guide www.xilinx.com 65UG639 (v 12.2) July 23, 2010Lesson 3 - System ControlThe Xilinx “xl_state” Data TypeWh

Pagina 63 - Lesson 3 - System Control

66 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedState Machine ExampleThe figure

Pagina 64 - The MCode Block

System Generator for DSP Getting Started Guide www.xilinx.com 67UG639 (v 12.2) July 23, 2010Lesson 3 - System ControlThe Expression BlockThe Expressio

Pagina 65

68 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedReset and Enable PortsMost Syste

Pagina 66 - State Machine Example

System Generator for DSP Getting Started Guide www.xilinx.com 69UG639 (v 12.2) July 23, 2010Lesson 3 - System ControlBursty DataSeveral of the more co

Pagina 67 - The Expression Block

System Generator for DSP Getting Started Guide www.xilinx.com 7UG639 (v 12.2) July 23, 2010PrefaceAbout This GuideThis Getting Started Guide introduce

Pagina 68 - Reset and Enable Ports

70 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedLesson 3 Summary• Use the MCode

Pagina 69 - Bursty Data

System Generator for DSP Getting Started Guide www.xilinx.com 71UG639 (v 12.2) July 23, 2010Lesson 4 - Multi-Rate SystemsLesson 4 - Multi-Rate Systems

Pagina 70 - Lab Exercise: System Control

72 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedUp and Down Sampling BlocksSyste

Pagina 71 - Lesson 4 - Multi-Rate Systems

System Generator for DSP Getting Started Guide www.xilinx.com 73UG639 (v 12.2) July 23, 2010Lesson 4 - Multi-Rate SystemsRate Changing Functional Bloc

Pagina 72 - Up and Down Sampling Blocks

74 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedViewing Rate Changes in Simulink

Pagina 73

System Generator for DSP Getting Started Guide www.xilinx.com 75UG639 (v 12.2) July 23, 2010Lesson 4 - Multi-Rate SystemsDebugging ToolsSystem Generat

Pagina 74

76 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedSample Period “Rules”The illustr

Pagina 75 - Debugging Tools

System Generator for DSP Getting Started Guide www.xilinx.com 77UG639 (v 12.2) July 23, 2010Lesson 4 - Multi-Rate SystemsLab Exercise: Multi-Rate Syst

Pagina 76 - Sample Period “Rules”

78 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedLesson 5 - Using MemoriesBlock v

Pagina 77

System Generator for DSP Getting Started Guide www.xilinx.com 79UG639 (v 12.2) July 23, 2010Lesson 5 - Using MemoriesInitializing RAMs and ROMsThe RAM

Pagina 78 - Lesson 5 - Using Memories

8 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Preface: About This GuideAdditional ResourcesTo find additi

Pagina 79 - Initializing RAMs and ROMs

80 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedSystem Generator RAM BlocksSyste

Pagina 80 - System Generator RAM Blocks

System Generator for DSP Getting Started Guide www.xilinx.com 81UG639 (v 12.2) July 23, 2010Lesson 5 - Using MemoriesSystem Generator ROM BlocksThe RO

Pagina 81 - System Generator ROM Blocks

82 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedThe Delay BlockThe Delay block i

Pagina 82 - The Delay Block

System Generator for DSP Getting Started Guide www.xilinx.com 83UG639 (v 12.2) July 23, 2010Lesson 5 - Using MemoriesThe FIFO BlockThe FIFO block supp

Pagina 83 - The FIFO Block

84 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedShared Memory BlockSystem Genera

Pagina 84 - Shared Memory Block

System Generator for DSP Getting Started Guide www.xilinx.com 85UG639 (v 12.2) July 23, 2010Lesson 5 - Using MemoriesLab Exercise: Using MemoriesIn th

Pagina 85 - Lab Exercise: Using Memories

86 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedLesson 6 - Designing FiltersIntr

Pagina 86 - Lesson 6 - Designing Filters

System Generator for DSP Getting Started Guide www.xilinx.com 87UG639 (v 12.2) July 23, 2010Lesson 6 - Designing FiltersThe Virtex DSP48 Math SliceThe

Pagina 87 - The Virtex DSP48 Math Slice

88 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedFIR Compiler BlockThe Xilinx Fir

Pagina 88 - FIR Compiler Block

System Generator for DSP Getting Started Guide www.xilinx.com 89UG639 (v 12.2) July 23, 2010Lesson 6 - Designing FiltersCreating Coefficients with FDA

Pagina 89

System Generator for DSP Getting Started Guide www.xilinx.com 9UG639 (v 12.2) July 23, 2010ConventionsOnline DocumentThe following conventions are use

Pagina 90 - Using FDA Tool Coefficients

90 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedUsing FDA Tool CoefficientsOnce

Pagina 91 - Virtex®-5 architecture

System Generator for DSP Getting Started Guide www.xilinx.com 91UG639 (v 12.2) July 23, 2010Lesson 6 - Designing FiltersLab Exercise: Designing Filter

Pagina 92 - ChipScope Examples

92 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedAdditional Examples and Tutorial

Pagina 93 - DSP Examples

System Generator for DSP Getting Started Guide www.xilinx.com 93UG639 (v 12.2) July 23, 2010Additional Examples and TutorialsDSP ExamplesTopic Descrip

Pagina 94 - Processor Examples

94 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedM-Code ExamplesProcessor Example

Pagina 95 - Shared Memory Examples

System Generator for DSP Getting Started Guide www.xilinx.com 95UG639 (v 12.2) July 23, 2010Additional Examples and TutorialsShared Memory Examples Tu

Pagina 96 - Miscellaneous Examples

96 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting StartedTiming Analysis ExamplesMiscella

Pagina 97 - System Generator Demos

System Generator for DSP Getting Started Guide www.xilinx.com 97UG639 (v 12.2) July 23, 2010Additional Examples and TutorialsSystem Generator DemosSys

Pagina 98

98 www.xilinx.com System Generator for DSP Getting Started GuideUG639 (v 12.2) July 23, 2010Chapter 4: Getting Started

Pagina 99

System Generator for DSP Getting Started Guide www.xilinx.com 99UG639 (v 12.2) July 23, 2010CCompatibilityMATLAB 28, 29, 34Simulink 28, 34Xilinx ISE

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